Our consulting staff consists of a team of seasoned engineers of diversed disciplines within the field of VLSI design. Consulting terms can be part-time, full-time, on-site, or off-site. Our consulting staff has access to many of the EDA tools commonly used in the industry for design entry, synthesis, analysis, simulation, and verification.

Please contact us for more details.

 

Custom Circuit Design:

Transistor-level digital circuit design, high-speed SRAM, TLB, I/O buffers, data-path and arithmetic elements, circuit simulation, supervision of physical layout, full-chip floorplanning, etc.

ASIC Design:

RTL (Verilog) design, verification, simulation environment and test-benches, reference model C-programming, logic synthesis, ASIC sign-off process, back-end timings, and scan design, design for testability, memory BISTs, etc.

ECAD Tool Development:

Custom in-house tool development, EDA flows, and C, Perl, Awk, Unix Shell programming.

Cell Library Development:

Custom or ASIC standard cell library development, characterization, documentation, etc.

Physical Design:

 

Layout integration, data-path layout compilation, memory structure compilation, place-and-route, layout DRC, ERC, LVS verification (with Cadence, Avant!, or Mentor Graphic toolsets), etc.

Custom Mask Design:

Custom CMOS layout for digital circuits. (Off-site, per-project basis only).

 

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